The present disclosure is generally related to class-D amplifiers, and more specifically to multilevel class-D amplifiers.
A class-D amplifier, also known as a switching amplifier, includes amplifying devices (e.g., field-effect transistors (FETs), metal-oxide FETs (MOSFETs), power MOSFETs) that are implemented as electronic switches, instead of as linear gain devices, as in linear amplifiers. A class-D amplifier includes an input stage that uses, e.g., pulse-width modulation (PWM), to convert an input analog signal (to be amplified by the class-D amplifier) to a train of constant amplitude pulses having a variable duty cycle that is proportional to instantaneous values of the input analog signal. The train of pulses, also referred to as a PWM signal, is indicative of the input signal. The class-D amplifier further includes an output stage that uses two pairs of high-voltage switches (e.g., power MOSFETs) which are driven by respective instances of the PWM signal and, when a load is coupled to output ports of the output stage, are arranged to form an output bridge. In this manner, the output stage delivers a constantly changing voltage into the coupled load as an amplified signal, which is an amplified replica of the PWM signal provided by the input stage. A low-pass filter can remove high-frequency switching components of the amplified signal to recover information carried by the input analog signal, where the recovered information is to be used by the load. Note that, although the class-D amplifier uses a source of DC power, e.g., a battery that outputs a voltage level VBAT (e.g., VBAT=3.7V), the amplification process itself operates by switching.
Moreover, boosting technologies can be implemented in conjunction with the output stage to increase a level of the foregoing amplified signal above VBAT. FIG. 9A shows an output stage of a class-D amplifier implemented in a conventional charge-pump configuration. Here, the output stage is driven by two PWM signals (LP and LM) indicative of an input analog signal, and uses a charge-pump circuit, powered by a voltage level VBAT, in conjunction with a fly capacitor CFly and a tank capacitor CTank. In this manner, the output bridge of the output stage is powered by a larger voltage level 2VBAT output by the charge-pump circuit. Hence, an amplified signal VLoad, provided to the load by the output stage implemented in the charge-pump configuration, is a train of pulses having constant amplitude 2VBAT=7.4V>VBAT, as shown in FIG. 9B. FIG. 10A shows an output stage of a class-D amplifier implemented in a conventional DC-DC boosted configuration. Here, the output stage also is driven by two PWM signals (LP and LM) indicative of an input analog signal, but uses a DC-DC boost converter, powered by a voltage level VBAT through a boost inductor LBST. In this manner, the output bridge of the output stage is powered by a larger voltage level VBST output by the DC-DC boost converter, where VBST>VBAT (because, e.g., VBST=5.5V). Hence, an amplified signal VLoad provided to the load, by the output stage implemented in the DC-DC boosted configuration, is a train of pulses having constant amplitude VBST, as shown in FIG. 10B.
A conventional combination of the charge-pump configuration and the DC-DC boosted configuration of the class-D amplifier can be implemented, in which a DC-DC boost converter powered by VBAT through a boost inductor LBST powers the charge-pump circuitry and causes the latter to output a voltage 2VBAT=11V. Here, an amplified signal VLoad provided to the load, by the output stage implemented as a combination of charge-pump configuration and DC-DC boosted configuration, is a train of pulses having constant amplitude 2VBST. Note, however, that the amplified signal VLoad (e.g., illustrated either in FIG. 9B or FIG. 10B) provided to the load by the output stage, in either of the conventional configurations shown in FIG. 9A or FIG. 10A or in the noted conventional combination thereof, is always a single-level amplified signal.